Engineer II - Digital ASIC Design at Microchip Technology Inc. · San Jose, CA · Joined
MI
Engineer II - Digital ASIC Design
Microchip Technology Inc. · San Jose, CA · Just now · 0 applicants
NewOn-siteFull-timeMiddle
Pay
$70k–$143kListed
Workplace
On-site
Job type
Full-time
Level
Middle
Source: jobright · Posted by joined-scrapper
About the role
Designs and implements complex digital IP blocks for ASIC projects, focusing on RTL design and power/performance/area optimization, while collaborating with verification, physical design, and validation teams.
What you’ll do
Implement complex digital IP blocks from concept to delivery
Perform RTL design and power, performance, and area optimization
Collaborate across teams for integration and verification
Work with physical design teams
Create and maintain design documentation
What you’ll need
2.5-5 years of ASIC or FPGA digital design experience
BS degree in Electrical Engineering
Proficiency in System Verilog and synchronous/asynchronous design
Experience with full Cadence/Synopsys front-end EDA flow
Familiarity with PHY or Serdes protocols
Post-silicon validation and lab equipment experience
Original job description
Microchip Technology Inc. is hiring an Engineer II - Digital ASIC Design to implement complex digital IP blocks from concept to delivery. The role focuses on RTL design, power, performance, and area optimization, cross-team integration, verification, physical design collaboration, and design documentation.2.5 - 5 years of proven experience in ASIC or FPGA…