About the role

What you’ll do

• Lead architecture, design, and delivery of next-generation FPGA and programmable SoC solutions
• Develop digital logic and reusable IP from requirements through RTL delivery, validation, and product readiness
• Guide technical decisions across planning, risk management, schedule alignment, and prioritization
• Lead design execution across functional blocks and chip-level integration
• Collaborate with architecture, RTL, verification, physical design, CAD, firmware/software, and system validation teams
• Serve as a senior technical mentor in a matrixed engineering environment

What you’ll need

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical discipline with 15+ years of relevant FPGA/ASIC/SoC/semiconductor experience
• Demonstrated technical leadership delivering complex digital subsystems or products from system/microarchitecture through RTL, verification, integration, implementation, and post-silicon validation
• Deep hands-on expertise in Verilog/SystemVerilog RTL design, synthesis, lint, CDC/RDC, formal/equivalence checking, timing constraints, and implementation-aware design practices
• Experience with high-performance digital architectures including networking/packet-processing, PCIe/CXL, Ethernet, DDR/HBM, high-speed interfaces, or on-chip interconnect
• Strong understanding of performance, power, area, timing, bandwidth, latency, congestion, and reliability tradeoffs in advanced digital systems
• Strong communication, collaboration, and influence across architecture, RTL, verification, physical design, CAD, firmware/software, system validation, and product engineering organizations

Original job description