ASIC Engineer, Performance Architecture and Modeling at Meta · Menlo Park, CA · Joined
M
ASIC Engineer, Performance Architecture and Modeling
Meta · Menlo Park, CA · Just now · 0 applicants
NewOn-siteFull-timeSenior
Pay
$146k–$209kListed
Workplace
On-site
Job type
Full-time
Level
Senior
Team: Silicon Engineering · Source: jobright · Posted by joined-scrapper
About the role
Meta's Silicon Engineering organization is seeking an ASIC Engineer to define and drive performance architecture, pre-silicon modeling, and microarchitectural exploration for custom silicon used in AI and data center infrastructure, collaborating with cross-functional teams to meet throughput, latency, and efficiency targets.
What you’ll do
Define and drive performance architecture
Perform pre-silicon modeling
Conduct microarchitectural exploration
Partner with architecture, design, and software teams
Meet throughput, latency, and efficiency targets
What you’ll need
Bachelor's degree in CS/CE or related field
6+ years of experience in ASIC design or silicon engineering
Proficiency in C++ and Python
5+ years of experience in performance modeling
Experience with cycle-accurate/transaction-level modeling using SystemC
Experience with hardware description languages and simulation environments
Original job description
Meta’s Silicon Engineering organization builds custom silicon for its AI and data center infrastructure. The ASIC Engineer defines and drives performance architecture, pre-silicon modeling, and microarchitectural exploration, partnering with architecture, design, and software teams to meet throughput, latency, and efficiency targets.Bachelor's degree in…