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SMTS Silicon Design Engineer at AMD · San Diego, CA · Joined
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SMTS Silicon Design Engineer

AMD · San Diego, CA · Just now · 0 applicants
NewOn-siteFull-timeSenior
Pay
$156k–$223kListed
Workplace
On-site
Job type
Full-time
Level
Senior
Source: jobright · Posted by joined-scrapper

About the role

AMD is seeking an SMTS Silicon Design Engineer to lead ASIC definition, design, verification, and documentation, with a focus on analog circuits for power management IPs. The role includes architecture, layout, and design process evaluation in San Diego.

What you’ll do

  • Lead ASIC definition, design, verification, and documentation
  • Develop analog circuits in advanced process nodes for power management IPs
  • Create test plans to verify designs against circuit and block microarchitecture specifications
  • Develop placement and floor planning layout using Cadence Virtuoso
  • Analyze electromigration and reliability using Ansys Totem and RedHawk
  • Optimize performance, power, area, and reliability of circuits

What you’ll need

  • Master's degree or foreign equivalent in Computer Engineering, Electrical Engineering, Electronics Engineering, or related field
  • Four years of experience in the job offered or closely related engineering role (or Bachelor's plus six years)
  • Two years of experience developing analog circuits in advanced process nodes for power management IPs
  • Two years of experience creating test plans and developing placement/floorplanning layout with Cadence Virtuoso
  • Two years of experience analyzing electromigration and reliability using Ansys Totem and RedHawk
  • Two years of experience optimizing performance, power, area, and reliability of circuits

Original job description

Advanced Micro Devices, Inc. (AMD) is hiring an SMTS Silicon Design Engineer to lead ASIC definition, design, verification, and documentation. The role focuses on integrated-circuit architecture and layout, evaluating the design process flow, and contributing engineering expertise to AMD product development.Master's degree or foreign equivalent in…

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