Senior ASIC Design Verification Engineer - LPU at NVIDIA · Santa Clara, CA + 5 more · Joined
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Senior ASIC Design Verification Engineer - LPU
NVIDIA · Santa Clara, CA + 5 more · Just now · 0 applicants
NewHybridFull-timeSenior
Pay
$168k–$264kListed
Workplace
Hybrid
Job type
Full-time
Level
Senior
Team: LPU · Source: jobright · Posted by joined-scrapper
About the role
NVIDIA is seeking a senior verification engineer to verify an inference accelerator ASIC, covering architecture, reference models, and microarchitecture. The role involves cross-team collaboration and improving automated verification flows.
What you’ll do
Verify inference accelerator design and implementation
Develop and execute ASIC design verification
Work with architecture, reference models, and microarchitecture
Collaborate across design and verification teams
Improve automated verification flows
What you’ll need
BS in EE, CS, or CE or equivalent experience
8+ years relevant industry experience
Expertise in SystemVerilog and UVM
Experience with VCS, Verdi, or equivalent tools
Random stimulus, functional coverage, and assertion-based verification
ASIC design flow from specification to GDS
Original job description
NVIDIA is hiring a Senior ASIC Design Verification Engineer to verify the design and implementation of an inference accelerator. The role develops and executes verification for ASIC designs, architecture, reference models, and microarchitecture, while collaborating across design and verification teams and improving automated verification flows.Bachelors…