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Staff Design Verification Engineer at Cerebras · Sunnyvale, CA · Joined
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Staff Design Verification Engineer

Cerebras · Sunnyvale, CA · Just now · 0 applicants
NewOn-siteFull-timeLead
Pay
$225k–$270kListed
Workplace
On-site
Job type
Full-time
Level
Lead
Source: jobright · Posted by joined-scrapper

About the role

Staff Design Verification Engineer at Cerebras Systems, responsible for developing verification strategies, reusable environments, and coverage plans for AI processor hardware, collaborating with cross-functional teams to debug and improve verification quality across simulation, emulation, and silicon bring-up.

What you’ll do

  • Develop verification strategies, reusable environments, tests, and coverage plans
  • Debug complex issues across simulation, emulation, and silicon bring-up
  • Collaborate with architecture, design, firmware, validation, and other cross-functional engineering teams
  • Improve verification quality and efficiency

What you’ll need

  • 10+ years of hands-on Design Verification experience
  • Deep knowledge of SystemVerilog, DPI and UVM
  • Proficiency in scripting languages like Python or Perl
  • Experience with verification methodologies and tools
  • Knowledge of pipelined processor architecture
  • BS or MS in Computer Science or Electrical Engineering

Original job description

Cerebras Systems builds AI processor hardware and platforms designed to accelerate model training and inference. The Staff Design Verification Engineer will develop verification strategies, reusable environments, tests, and coverage plans while debugging complex issues across simulation, emulation, and silicon bring-up. The role collaborates with…

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