Package Design Engineer at Google · Sunnyvale, CA · Joined
G
Package Design Engineer
Google · Sunnyvale, CA · Just now · 0 applicants
NewOn-siteFull-timeSenior
Pay
$163k–$236kListed
Workplace
On-site
Job type
Full-time
Level
Senior
Team: Silicon Integration · Source: jobright · Posted by joined-scrapper
About the role
Google's Silicon Integration team is hiring a Package Design Engineer to develop advanced package substrate designs for ML chips, managing the design process from feasibility through production sign-off and integrating advanced packaging technologies into the chip design pipeline.
What you’ll do
Develop advanced package substrate designs for ML chips
Manage design process from feasibility through production sign-off
Incorporate advanced packaging technologies into Google's chip design pipeline
What you’ll need
Bachelor's degree in Mechanical Engineering, Material Engineering, Electrical Engineering, Technology, Science, or related field
8 years of experience in chip package substrate design using Cadence APD or Mentor Expedition
Experience in chip package substrate layout, design verification, DFM, and taping out for production
Experience in design automation and scripting
Experience working with cross-functional teams including chip design, SI/PI, and PCB design teams
Experience in 2.5D/3.5D advanced package design and physical verification flow
Original job description
Google is hiring a Package Design Engineer on its Silicon Integration team to develop advanced package substrate designs for ML chips. The role manages the design process from feasibility through production sign-off and helps incorporate advanced packaging technologies into Google’s chip design pipeline.Bachelor's degree in Mechanical Engineering,…