Senior Principal Digital IC Design Engineer at Marvell Technology · Santa Clara, CA · Joined
MT
Senior Principal Digital IC Design Engineer
Marvell Technology · Santa Clara, CA · Just now · 0 applicants
NewOn-siteFull-timeLead
Pay
$182k–$273kListed
Workplace
On-site
Job type
Full-time
Level
Lead
Team: Data Center Engineering · Source: jobright · Posted by joined-scrapper
About the role
Senior Principal Digital IC Design Engineer leading digital design for high-speed mixed-signal ICs in Marvell's Data Center Engineering group, focusing on micro-architecture, RTL, verification, silicon bring-up, and mentoring.
What you’ll do
Lead digital design efforts for high-performance mixed-signal ICs used in high-speed interconnects
Develop micro-architecture and RTL
Collaborate with verification teams
Support silicon bring-up
Mentor other digital design engineers
What you’ll need
Bachelor's in CS/EE with 12+ years, Master's with 10+, or PhD with 5+ years related experience
Extensive experience in Verilog/SystemVerilog, Synthesis, STA, low power design, Spyglass, LINT, and CDC checks
Hands-on scripting experience in Perl/Python
Eligibility to access export-controlled technology as per U.S. regulations
Original job description
Marvell is a semiconductor company building the data infrastructure technologies that connect enterprise, cloud, AI, and carrier systems. The company is seeking a Senior Principal Digital IC Design Engineer to join its Data Center Engineering business group and lead digital design efforts for high performance mixed signal ICs used in high speed…