Next-Gen, High-Speed HBM, LPDDR Memory Subsystem ASIC Digital Design Engineer at Qualcomm · San Diego, CA · Joined
Q
Next-Gen, High-Speed HBM, LPDDR Memory Subsystem ASIC Digital Design Engineer
Qualcomm · San Diego, CA · Just now · 0 applicants
NewOn-siteFull-timeJunior
Pay
$101k–$152kListed
Workplace
On-site
Job type
Full-time
Level
Junior
Source: jobright · Posted by joined-scrapper
About the role
Entry-level ASIC digital design engineer focused on high-speed memory subsystems (HBM, LPDDR) at Qualcomm, assisting with architecture, design, verification, and implementation of memory IP and ASIC products.
What you’ll do
Assist with architecture, design, optimization, verification, implementation, and documentation of high-speed memory subsystem IP and ASIC products
Support architecture development and implementation flows
Work with design tools and technical documentation
Perform design verification methods under supervision
What you’ll need
Bachelor's degree in Science, Engineering, or related field
Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science
6+ months of experience with architecture and design tools
6+ months of experience with scripting tools and programming languages
6+ months of experience with design verification methods
Original job description
Qualcomm Technologies, Inc. is a technology innovator developing high-performance products for connected experiences and data processing. The ASIC Digital Design Engineer will assist with the architecture, design, optimization, verification, implementation, and documentation of high-speed memory subsystem IP and ASIC products. The role supports architecture…