Sr Staff Engineer-DFT at Marvell Technology · Santa Clara, CA · Joined
MT
Sr Staff Engineer-DFT
Marvell Technology · Santa Clara, CA · Just now · 0 applicants
NewOn-siteFull-timeLead
Pay
$134k–$201kListed
Workplace
On-site
Job type
Full-time
Level
Lead
Source: jobright · Posted by joined-scrapper
About the role
Senior Staff DFT Engineer responsible for defining and implementing DFT methodology for next-gen Optical DSP ASICs, leading test planning and silicon bring-up, and mentoring engineers.
What you’ll do
Define and implement DFT methodology
Lead test planning and sign-off
Debug silicon
Mentor engineers across design and test teams
What you’ll need
BS/MS in EE/CE with 5-8+ years of DFT experience
Experience with multiple tape-outs and silicon bring-ups
Expertise in scan, compression, ATPG, MBIST, JTAG, at-speed test
Strong DFT timing/STA knowledge
Proven independent problem solving and mentoring
Eligibility to access export-controlled information
Original job description
Marvell Technology develops semiconductor solutions for data infrastructure. The Senior Staff DFT Engineer will define and implement DFT methodology for next-generation Optical DSP ASICs, lead test planning and sign-off, debug silicon, and mentor engineers across design and test teams.BS in EE/CE with 8+ years or MS in EE/CE with 5+ years of DFT…