Physical Design Engineer at Cerebras · Sunnyvale, CA · Joined
C
Physical Design Engineer
Cerebras · Sunnyvale, CA · Just now · 0 applicants
NewOn-siteFull-timeSenior
Pay
$180k–$280kListed
Workplace
On-site
Job type
Full-time
Level
Senior
Source: jobright · Posted by joined-scrapper
About the role
Cerebras Systems is hiring a Physical Design Engineer to own physical design and implementation from RTL to tapeout for AI supercomputing chips, driving power, performance, and area strategy. The role collaborates with RTL teams on full-chip integration and requires deep expertise in physical verification, timing closure, and STA.
What you’ll do
Drive power, performance, and area strategy
Own physical design and implementation from RTL to tapeout
Collaborate with RTL teams to ensure seamless full-chip integration
What you’ll need
7+ years of physical design and physical verification experience; BS or MS in Electrical Engineering
Strong knowledge of block-level and full-chip physical verification methodology
Expert in block/subsystem timing closure and power/performance/area optimization
Expert with ICV or Calibre resolving block and full-chip DRC and LVS issues, plus IR/EM analysis
Strong background in STA, constraint drafting, and timing convergence; good understanding of full-chip floor planning and integration
Strong scripting in Tcl/Python, ability to make flow enhancements, and experience with Design Compiler, Fusion Compiler, ICC2 or similar
Original job description
Cerebras Systems builds AI chips designed to deliver high-speed training and inference. The Physical Design Engineer will drive power, performance, and area strategy, own physical design and implementation from RTL to tapeout, and collaborate with RTL teams to ensure seamless full-chip integration.7+ years of physical design & physical verification…