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Senior Principal Digital Design Engineer at Astera Labs · San Jose, CA · Joined
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Senior Principal Digital Design Engineer

Astera Labs · San Jose, CA · Just now · 0 applicants
NewOn-siteFull-timeLead
Pay
$205k–$255kListed
Workplace
On-site
Job type
Full-time
Level
Lead
Source: jobright · Posted by joined-scrapper

About the role

Senior Principal Digital Design Engineer at Astera Labs, leading advanced digital design implementation for AI connectivity silicon with a focus on performance, power, and area trade-offs, while mentoring engineering teams and collaborating cross-functionally.

What you’ll do

  • Lead architecture and implementation of advanced digital designs for AI connectivity
  • Focus on performance, power, and area trade-offs
  • Mentor engineering teams
  • Collaborate cross-functionally

What you’ll need

  • Bachelor's degree in Electrical Engineering or equivalent
  • 12+ years of hands-on experience developing complex SoC/silicon products in Server, Storage, and/or Networking markets
  • Expertise in architecture definition, micro-architecture development, RTL coding, synthesis, and timing closure
  • Deep knowledge of at least one high-speed protocol (PCIe, CXL, Ethernet, DDR, or similar)
  • Production experience with advanced CMOS nodes (≤7nm)
  • Proficiency with Cadence and/or Synopsys digital design flows

Original job description

Astera Labs is a leading provider of rack-scale AI infrastructure through innovative connectivity solutions. They are seeking a Senior Principal Digital Design Engineer to lead the architecture and implementation of advanced digital designs for AI connectivity, focusing on performance, power, and area trade-offs while mentoring engineering teams and…

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