STA Engineer at eInfochips (An Arrow Company) · San Jose, CA · Joined
EC
STA Engineer
eInfochips (An Arrow Company) · San Jose, CA · Just now · 0 applicants
NewOn-siteFull-timeSenior
Pay
Pay not listed
Workplace
On-site
Job type
Full-time
Level
Senior
Source: jobright · Posted by joined-scrapper
About the role
Develops, verifies, and debugs timing constraints for ASIC designs, focusing on STA closure across functional and test modes. Collaborates with design and implementation teams and improves engineering workflows through scripting.
What you’ll do
Develop, verify, and debug timing constraints for ASIC designs
Perform timing analysis and closure across functional and test modes
Debug and analyze PCIe and TSMC memory timing constraints
Debug and close timing for DFT modes including scan shift/capture and BIST
Collaborate with design and implementation teams
Improve engineering workflows using scripting
What you’ll need
Bachelor's degree and 5 years related experience, Master's plus 5, or PhD plus 3
Hands-on experience developing and verifying timing constraints
Hands-on experience with RTL design
Programming experience with at least two of Perl, Tcl, Python, or Makefile
Experience debugging SDC and using Synopsys TCM and PrimeTime STA tools
Experience with Synopsys Fusion Compiler, Design Compiler, and Tessent
Original job description
eInfochips (an Arrow company) is hiring an STA Engineer to develop, verify, and debug timing constraints for ASIC designs. The role supports timing analysis and closure across functional and test modes, collaborates with design and implementation teams, and uses scripting to improve engineering workflows.Bachelor's degree and 5 years of related…